Modern microprocessors employ a wide variety of strategies to improve processing and execution. One category of improvements involves translating instructions of a given instruction set architecture (ISA). Translated versions of ISA code can offer various performance benefits relative to the non-translated ISA instructions when executed by the microprocessor. In some cases, systems with translations are inefficient in the way that they provide the processing pipeline with access to translated code. For example, some systems may persist in a state in which valuable, frequently-executed translations are relatively more difficult to access than translations providing lesser benefits.